1. Field of the Invention
The present invention generally relates to an improvement of a step of patterning a resist for forming a desired minute pattern on a semiconductor substrate in a method of manufacturing a semiconductor device. More particularly, it relates to an improvement of a structure of a light irradiation apparatus used in the resist patterning step.
2. Description of the Background Art
Recently, a semiconductor device has been developed remarkably and the degree of integration and miniaturization of a circuit pattern constituting the semiconductor device has been increased. In order to implement a higher degree of integration and miniaturization of the semiconductor device, various developments and improvements in the manufacturing process and manufacturing apparatus are made.
When the structure of the semiconductor device is to be miniaturized, a resist patterning technique using photolithography is one of the important techniques. This is a technique which patterns a semiconductor layer or a metal layer deposited on the semiconductor substrate into a predetermined miniaturized configuration. Referring to FIGS. 3A to 3D, a description is given of this resist patterning technique. In addition, this resist patterning technique is described in, for example, the Japanese Patent Laying-Open Gazette No. 295420/1987.
First, a resist 3 of a photosensitive material is applied to the surface of a patterned layer 2 formed on a semiconductor substrate 1. Then, the resist 3 is selectively exposed to light such as X-rays or UV-rays using a mask pattern 4. The mask pattern 4 has a predetermined pattern (FIG. 3A).
Then, the exposed resist 3 is developed to remove a resist other than a resist pattern 3a having a predetermined configuration (FIG. 3B).
Next, the surface of the resist pattern 3a is irradiated with light to cure the surface of the resist pattern 3a (FIG. 3C).
Thereafter, the resist pattern 3a is baked at a high temperature in a baking treatment (FIG. 3D).
As described above, the resist pattern is formed.
A description was given of a case where the above described steps used a positive resist in which an exposed portion was removed.
A description is given of a curing treatment of the surface of the resist pattern 3a by light irradiation shown in FIG. 3C.
FIG. 4 is a schematic structure of a conventional light irradiation apparatus. In addition, FIG. 4 is a schematic diagram showing the state in which the resist pattern 3a is irradiated with light using this device. Referring to FIG. 4, a semiconductor substrate (wafer) 1 on which the resist pattern 3a was formed in a developing treatment is put on a stage 5. A light source 6 for light irradiation is arranged above the stage 5. In addition, a concave reflection mirror 7 is provided above the light source 6. The reflection mirror 7 reflects the light irradiated from the light source 6 to produce collimated light. There is provided a shutter 9 for shading or transmitting irradiation light 8 between the light source 6 and the stage 5.
Light irradiation processing using the above-mentioned light irradiation apparatus is carried out as follows. The wafer 1 on which the resist pattern 3a was formed is carried onto the stage 5 in the light irradiation apparatus by carrying means (not shown) and fixed on the surface of the stage 5. Then, the shutter 9 is opened by driving means (not shown). Thereafter, far ultraviolet rays (irradiation light) 8 is irradiated from the light source 6. The far ultraviolet rays 8 reflects on the surface of the reflection mirror 7 and becomes collimator light. Then, the whole surface of the wafer 1 on which the resist pattern 3a was formed is irradiated with the collimator light of the far ultraviolet rays 7.
The far ultraviolet rays 8 have usually a short wavelength of 200.about.300 nm. Irradiation time is usually approximately 1.about.2 minutes. The surface of the resist pattern 3a irradiated with the far ultraviolet rays 8 of a short wavelength is cured by a photopolymerization reaction. Then, the resist pattern 3a having a cured surface prevents a pattern precision from deteriorating during the baking treatment shown in FIG. 3D.
A description is given of a difference of pattern configurations after the baking treatment with or without the light irradiation treatment, using FIGS. 5 and 6. FIG. 5 is a sectional view of a wafer in a case where the light irradiation treatment was not performed. FIG. 6 is a sectional view of a wafer in a case where the light irradiation treatment was performed. Referring to FIGS. 5 and 6, the configuration of the resist pattern before the baking treatment is shown by a dotted line 10. The configuration of the resist pattern after the baking treatment is shown by a solid line 11.
As shown in FIG. 5, a resist droop of the resist pattern is formed due to a high temperature during baking in the resist pattern not treated with the light irradiation. For this reason, the resist pattern originally formed with a line width W1 is enlarged to be a line width of W2, so that the sectional configuration of the resist pattern is changed. As a result, the resist pattern is prevented from being miniaturized.
On the other hand, as shown in FIG. 6, in the resist pattern treated with the light irradiation, pattern width W3 changed by the baking treatment is smaller than the pattern width W2 shown in FIG. 5, because a cured surface layer is formed on the surface of the resist pattern by the light irradiation treatment, which enhances heat resistance during the baking treatment.
As described above, a method of manufacturing a conventional semiconductor device comprises the step of irradiating the whole surface of the resist pattern 3a formed on the wafer 1 with light to cure the surface.
However, when the light irradiation treatment was performed, it was found that a number of cracks were formed at the resist applied to the peripheral edge portion of the wafer. This crack deteriorates the adhesion between the resist and the wafer surface. In addition, it causes damage or peeling of the resist pattern. More specifically, since the wafer 1 having the resist pattern 3a often touches a guide portion or supporting portion of the device when it is carried or handled during the manufacturing step, or housed or fetched to or from a cassette, the resist pattern 3a on the wafer 1 is strongly shocked at this time. Since the resist pattern 3a is brittle, the resist is cracked by the shock and the resist pattern is peeled or damaged. The peeled resist pattern is scattered on the wafer 1 as foreign substances and adheres to a normal resist pattern portion, causing a pattern defect. In addition, the scattered resist adheres to the guide portion or the supporting portion of the device and contaminates the device. It also adheres to another wafer surface during another wafer treatment, causing a pattern defect of the wafer. Such a pattern defect reducing a manufacturing yield of the semiconductor device.